Old Technology to the Rescue

By Philip Kane

Several months ago the Jameco newsletter featured a new, pin compatible, version of the 555 timer called the CSS555, developed by Custom Silicon Solutions Inc. The CSS555 contains, among other features, a programmable six-decade counter that enables the creation of very long time delays using low timing component values. It was just the feature I needed for a project requiring a time delay of up to 8 hours. However, there was one catch: Out of the package this chip functions like a standard 555 timer and you must configure it to take advantage of these extended features. So I set out to program the chip to take a longer term perspective. My Story

For someone like me who looks for any excuse to build another project, this obstacle was an opportunity. I decided to build my own programmer to help get the job done. I considered a number of possible options, including a stand-alone microprocessor based programmer, however, I was looking for an approach that would be quick and relatively inexpensive. Then it dawned on me that the solution was sitting right there in my closet.

The "solution" was an old laptop with a printer/parallel port. It was perfect since it would require minimal additional hardware, just a DB25 connector and a few components.

Old laptop

Parts List
Schem. Location
Description Mfr. P/N
IC1
74HC125 Tri-State Quad Buffer 74HC125
Q1
2N3904 NPN Transistor 2N3904
R1
10KΩ resistor CF1/4W103JCR
DB
25 (male pin) Connector 500-055
DB
25 Connector Hood MC14490P
Network Cable (remove connectors) 10X5-82215

The CSS555 Programmer Circuit

As you can see in figure 1, the programmer circuit is very simple. IC1 buffers the signals from the parallel port. IC2 is the CSS555 chip to be programmed. The figure shows the pin assignments when the chip is in programming mode. Transistor Q1 drives CSS555 pin 5 low when Enable is asserted. This disables normal timing mode and enables programming mode. Note that when Q1 is off (programming mode not enabled) the voltage at pin 5 is pulled up to 2/3 of the supply voltage by an internal voltage divider.
schematic

The following table shows my pin assignments for the CSS555 in programming mode and the corresponding parallel port signals. On my old laptop the parallel port base address is H378. So, the port addresses are Data register = H378, Status register = H379, Control register = H37a. I chose to connect the output from the CSS555 (pin 3) to bit 3 of the status port register (DB25 pin 15).

DB25 Pin PPort Signal PPort Register Bit Port CSS555 Pin
2 D0 Data 0 H378 Dataln (4)
15 ~Err Status 3 H379 DataOut (3)
1 ~Strobe Control 0 H37A ~Enable
14 ~LF Control 1 H37A SCLK (2)

Bits 0 and 1 of the control port are inverted by hardware. For example if bit 0 of the control port register is set to 1 the corresponding control port pin will be low. So, you must invert the bit before it is sent to the control port. For example to set the CSS555 SCLK pin to low, you must set bit 1 of the control port register to high.

Regarding the -Enable pin, remember that Transistor Q1 must be turned on to drive Enable low. This means that the pin associated with bit 0 of the control port register must be high. So to set -enable low you set bit 0 of the control port register to low.

Communicating with the CSS555

The CSS555 contains a serial interface through which you can store configuration data in the on chip EEPROM or read current configuration data from it. If you are using the CSS555C version of this chip, you can also adjust the value of the internal 100pf timing capacitor through this interface.

To communicate with the CSS555 you send a one or two byte command via the serial interface. The first byte of the command is the control byte. It specifies whether you are writing new configuration data to the EEPROM or reading current data from it.

The following table shows the possible control byte values. The least significant four bits specify the command (read EEPROM or program EEPROM). The most significant four bits specify configuration data or capacitor trim data that is to be read from or written to the EEPROM.

Description Address (MSB) Command (LSB) Hex Value
Read Configuration Data 0001 0001 H11
Read Capacitor Trim Data (CSS555C only) 0010 0001 H21
Program Configuration Data 0001 0010 H12
Program Capacitor Trim Data (CSS555C only) Command (LSB) H22

If you are programming the EEPROM with configuration or capacitor trim data (CSS555C), the command will include a second byte that contains the data.

The configuration data byte is separated into six fields. You set four of these fields with the appropriate values to specify the counter setting, timer operating mode, power setting, and upper and lower trip levels. For example, to configure the CSS555 with the settings Counter = 10, mode = monostable, power = low, and trip levels = standard you send the two byte command 00010010 00011001 (or H12 H19).

The location and function of each field are described in the following table.

Bit Field Option Description
Bits 0-2 Decade counter setting (timing capacitor multiplier value) You set this bit field to one of the values listed below to specify the corresponding timing capacitor multiplier value. If the multiplier value is set to 1 (000 or 111) the counter is disabled and the CS555 functions like a standard 555.
000 1 (Std 555)
001 10
010 100
011 1k
100 10k
101 100k
110 1M
111 111 1 (Std 555)
Bits 3 Timer operating mode You set this bit field to one of the values below to specify the timer operating mode.

0 – Astable
1 – Monostable
Bits 4 Power setting Set this field to specify

0 – Micro power
1 – Low power
Bits 5 Trip level 0 – Standard voltage (1/3 Vdd and 2/3 Vdd)
1 – Low voltage (10% Vdd and 90% Vdd)
Bits 6 Unused
Bits 7 CSS555 Version (Read only) 0 – CSS555
1 – CSS555C

If you're using the CSS555C version you can set the internal capacitor to any value from ~85pF to ~115pF in increments of approximately .12pF. To do this you set the second byte of the Program Capacitor Trim Data command to a value between H00 (85pF) and H255 (115pF). For example the two byte command 00100010 11111111 (or H22 HFF) will set the internal capacitor value to approximately 115pF.

The default values, set at the factory for operation as a standard 555 timer, are: Counter = 1, trip levels = 1/3 & 2/3 VDD and internal capacitor = 100pF (for the CSS555C).

The CSS555 Programmer Software

I wrote the programmer software in a variant of a language called Forth. Forth is not well known and has a syntax that can take a while to get used to. You can of course, use the programming language of your choice as long as it includes functions for hardware I/O port access. As you create your code, you should keep the following in mind.
  • Data is clocked in or out of the CSS555 on the low to high transition at SCLK.
  • The data byte is retrieved from the chip serially in LSB first order.
  • Before setting - Enable to low, to initiate program mode, you should set SCLK to low.
  • The data is stored in the EEPROM during the 9 clock pulse. That is, after the data byte is shifted into the chip (8 clock pulses) the next clock pulse writes it to EEPROM.
  • When SCLK goes low, before the 9th clock pulse, it should remain low for at least a 10 millisecond before it goes high.
To program the EEPROM, the software must perform the following steps.

1. Set SCLK pin low
2. Set -Enable pin low.
3. Shift in control byte (8 clock pulses)
4. Shift in data byte (8 clock pulses).
5. Set DataIn low.
6. Set SCLK low (keep low for at least 10 ms)
7. Write data byte to EEPROM (9th clock pulse – SCLK low to high transition).
8. Set - Enable pin high.

Figure 2 shows the resulting timing diagram.

Result of timing diagram

To get current configuration data from the EEPROM the software performs the following steps.

1. Set SCLK pin low
2. Set -Enable pin low.
3. Shift in command byte (8 clock pulses – low to high transition)
4. Shift out data (8 clock pulses – low to high transition).
5. Set - Enable pin high.

Figure 3 shows the resulting timing diagram.

Resulting timing diagram

Bits 0 and 1 of the control port are inverted by hardware. For example if bit 0 of the control port register is set to 1 the corresponding control port pin will be low. So, you must invert the bit before it is sent to the control port. For example to set the CSS555 SCLK pin to low, you must set bit 1 of the control port register to high.

Regarding the -Enable pin, remember that Transistor Q1 must be turned on to drive Enable low. This means that the pin associated with bit 0 of the control port register must be high. So to set -Enable low you set bit 0 of the control port register to low. The following pseudocode examples illustrate how to set SCLK and -Enable.

EnableLo()
Begin
Inport(Ctrlport, ctrlbyte) // Get current register
ctrlbyte = ctrlbyte AND b10 // set bit 0 to 0 ( Q1 = on, -Enable = low)
Outport (ctrlbyte, ctrlport) // update register
End

ClkHi()
Begin
var ctrlbyte
Inport(Ctrlport, ctrlbyte) // Get current register
ctrlbyte = ctrlbyte AND b01 //set bit 1 to 0 (SCLK = high)
Outport (ctrlbyte, ctrlport) // update register
End

To send a byte to the CSS555, you shift it, out one bit at a time, through pin 2 ( data port bit D0) of the parallel port. As each bit appears at the DataIn pin (4) it is shifted into the CSS555 by asserting SCLK. Here's a psuedocode example:
SndByte(byte data)
Begin
sdata = data
Loop i = 1 to 8
Outport(sdata, Dataport) // Send the data byte to the data port.
ClkLo() // Assert SCLK on the CSS555. The bit is
ClkHi() // shifted in on the rising clock pulse.
sdata = Shr(sdata, 1) // Right shift to send the next bit.
Endloop
End

To receive a byte from the CSS555 you shift it out through the chips DataOut pin (3) into the parallel port pin 15 ( status port bit 3). For example:

GetByte()
Begin
Loop I = 1 to 8
Sdata = 0
Bit = 0
Bit = Inport(statusport)
Bit = Sdata AND b1000 // mask off bit 3
Bit = Shl(Sdata, 4) // shift bit 3 to msb
Sdata = Shr(Sdata, 1) // shift right to receive the bit
Sdata = Bit OR Sdata
ClkLo() // Assert SCLK to get the next bit from CSS555
ClkHi() Endloop
End

Accessing the parallel port in later Windows versions

The operating system running on my old laptop is Windows 95, which provides full access to the parallel port. However, later versions of Windows (e. g. NT, 2000, XP, etc.) restrict user level access to the parallel port. There are a number of programming solutions to this problem. One of the more popular is a dll called Inpout32.dll, which enables your application to access the parallel port under all versions of Windows. It is available as a free download from Logix4U (http://www.logix4u.net/)

If you are new to parallel port programming, there is no shortage of information on the internet. One of the best sources I've found is Jan Axelson's Parallel Port Central web site at http://www.lvr.com/parport.htm. The site contains a large collection of information about the PC parallel port and contains links to related web sites.

Acknowledgments

Thanks to Frank Bohac of Custom Silicon Solutions Inc. for providing valuable technical assistance and for the fast turnaround on the updated app notes.


Phil Kane has been a technical writer in the software industry for over ten years. He has also occasionally authored articles for miscellaneous electronics enthusiast magazines.

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