These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.
Designed specifically for high speed
Contains two fully independent 2-to-4-line decoders/demultiplexers
Schottky clamped for high performance
Typical propagation delay time (3 levels of logic): 7.5 ns