This device is designed to multiplex signals from four-bit sources to four-output data lines in bus-organized systems. The 2-state outputs will not load the data lines when the output control pin is at a high-logic level.
Three-state outputs interface directly with system bus
Quad 2-input multiplexer
Same pin assignments as SN54LS157, SN74LS157, SN54S157, SN74S157