Consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q outputs. These devices can be used for shift register applications, and, by connecting Q output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line, respectively.
Features
Set-Reset capability
Static flip-flop operation -retains state indefinitely with clock level either "high" or "low"
Medium-speed operation-16MHz (typ.) clock toggle rate at 10V
Standardized symmetrical output characteristics
100% tested for quiescent current at 20V
Maximum input current of 1uA at 18V over full package temperature range; 100nA at 18V and 25°C
