Z80A CPUs are very easy to implement plus all output signals are fully decoded and timed to control standard memory or peripheral circuits. The circuit is implemented using an N-channel, ion implanted, silicon gate MOS process.
The Z80 microcomputer component set includes all the circuits necessary to build high-performance microcomputer systems with virtually no other logic and a minimum number of low cost standard memory elements. The two 16-bit index registers allow tabular data manipulation and easy implementation of relocatable code. The Refresh register provides for automatic, totally transparent refresh of external dynamic memories. The I register is used in a powerful interrupt response mode to form the upper 8 bits of a pointer to an interrupt service address table, while the interrupting device supplies the lower 8 bits of the pointer. An indirect call is then made to this service address.
Single chip, N-channel Silicon Gate CPU
158 Instructions - includes all 78 of the 8080A instructions with total software compatibility. New instructions include 4-, 8- and 16-bit operations with more useful addressing modes such as indexed, bit and relative
17 internal registers
Three modes of fast interrupt response plus a non-maskable interrupt
Directly interfaces standard speed static or dynamic memories with virtually no external logic
1.0µS instruction execution speed
Single 5 VDC supply and single-phase 5 volt Clock
Out-performs any other single chip microcomputer in 4-, 8- and 16-bit applications